1. Field of the Invention
The present invention relates generally to devices which share the use of a communication bus or the like, and, more particularly, to a method and apparatus for limiting the utilization of that communication bus by a given device.
2. Background Art
In simple data processing systems, the central processing unit communicates directly with each of the peripherals and memory circuits via direct, dedicated communication lines. In more sophisticated data processing systems, a communication bus is used to couple the central processing unit to one or more memory units, peripheral controllers, channel controllers, and the like. In some of the systems, devices other than the central processing unit are allowed to request and receive temporary control of the communication bus from the central processing unit. Typically, these "bus masters" utilize the communication bus to rapidly perform their assigned tasks, and then return control of the communication bus to the central processing unit. However, performance of the central processing unit and, in fact, the system as a whole, can be severely degraded if the bus masters other than the central processing unit are allowed to consume an excessive proportion of the available bandwidth of the communication bus.
In the past, some systems have limited the ability of each bus master to monopolize the communication bus by allowing only a single operation to be performed during each bus grant. This single transfer technique is generally inpractical in systems which incorporate the newer forms of intelligent peripheral controllers, disc controllers, and the like, which are most effective for performing burst type transfers. In the latter type of system, the system software is typically designed to restrict the size of those operations which must be performed by the bus master during a single burst of activity on the communication bus. This software limitation technique imposes substantial overhead on the system.